refactor: ll rcc pll example minor changes

This commit is contained in:
IOsetting 2023-01-22 13:42:05 +08:00
parent 671d555f3e
commit 3da26d4f62
3 changed files with 11 additions and 9 deletions

View File

@ -1,6 +1,4 @@
#include "main.h"
#include "py32f0xx_bsp_button.h"
#include "py32f0xx_bsp_led.h"
#include "py32f0xx_bsp_printf.h"
static void APP_SystemClockConfig(void);
@ -12,12 +10,17 @@ int main(void)
APP_GPIOConfig();
BSP_USART_Config(115200);
LL_RCC_ConfigMCO(LL_RCC_MCO1SOURCE_SYSCLK,LL_RCC_MCO1_DIV_1);
printf("Clock: %ld \r\n", SystemCoreClock);
while (1)
{
LL_mDelay(200);
LL_mDelay(1000);
LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_5);
printf("echo\r\n");
}
}
@ -26,7 +29,8 @@ static void APP_SystemClockConfig(void)
LL_UTILS_ClkInitTypeDef UTILS_ClkInitStruct;
LL_RCC_HSI_Enable();
LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz);
/* Change this value to adjust frequency */
LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz + 15);
while(LL_RCC_HSI_IsReady() != 1);
UTILS_ClkInitStruct.AHBCLKDivider = LL_RCC_SYSCLK_DIV_1;

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@ -31,8 +31,6 @@ extern "C" {
//debug printf redirect config
#define DEBUG_USART_BAUDRATE 115200
#define DEBUG_USART USART2
#define DEBUG_USART_CLK_ENABLE() LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2)
@ -59,7 +57,7 @@ extern "C" {
/************************************************************/
void BSP_USART_Config(void);
void BSP_USART_Config(uint32_t baudRate);
#ifdef __cplusplus

View File

@ -8,12 +8,12 @@
* @param None
* @retval None
*/
void BSP_USART_Config(void)
void BSP_USART_Config(uint32_t baudRate)
{
DEBUG_USART_CLK_ENABLE();
/* USART Init */
LL_USART_SetBaudRate(DEBUG_USART, SystemCoreClock, LL_USART_OVERSAMPLING_16, DEBUG_USART_BAUDRATE);
LL_USART_SetBaudRate(DEBUG_USART, SystemCoreClock, LL_USART_OVERSAMPLING_16, baudRate);
LL_USART_SetDataWidth(DEBUG_USART, LL_USART_DATAWIDTH_8B);
LL_USART_SetStopBitsLength(DEBUG_USART, LL_USART_STOPBITS_1);
LL_USART_SetParity(DEBUG_USART, LL_USART_PARITY_NONE);