diff --git a/Examples/LL/RCC/RCC_HSI_Output/main.c b/Examples/LL/RCC/RCC_HSI_Output/main.c
new file mode 100644
index 0000000..16f43b6
--- /dev/null
+++ b/Examples/LL/RCC/RCC_HSI_Output/main.c
@@ -0,0 +1,75 @@
+#include "main.h"
+#include "py32f0xx_bsp_button.h"
+#include "py32f0xx_bsp_led.h"
+#include "py32f0xx_bsp_printf.h"
+
+
+static void APP_SystemClockConfig(void);
+static void APP_GPIOConfig(void);
+
+
+int main(void)
+{
+  APP_SystemClockConfig();
+
+  APP_GPIOConfig();
+
+  LL_RCC_ConfigMCO(LL_RCC_MCO1SOURCE_SYSCLK,LL_RCC_MCO1_DIV_1);
+
+  while (1)
+  {
+    LL_mDelay(500);
+    LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_5);
+  }
+}
+
+static void APP_SystemClockConfig(void)
+{
+  LL_RCC_HSI_Enable();
+  LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz);
+  while(LL_RCC_HSI_IsReady() != 1);
+
+  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSISYS);
+  while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSISYS);
+
+  LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
+
+  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+  /* Update global SystemCoreClock(or through SystemCoreClockUpdate function) */
+  LL_SetSystemCoreClock(24000000);
+}
+
+static void APP_GPIOConfig(void)
+{
+  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
+  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
+
+  LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_5, LL_GPIO_MODE_OUTPUT);
+
+  /* PA08: MCO output */
+  // Add USE_FULL_LL_DRIVER to LIB_FLAGS to enable LL_GPIO_InitTypeDef
+  LL_GPIO_InitTypeDef GPIO_InitStruct;
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+  /* Alternate mode */
+  GPIO_InitStruct.Alternate = LL_GPIO_AF5_MCO;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+  /* No pull */
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+}
+
+void APP_ErrorHandler(void)
+{
+  while (1);
+}
+
+#ifdef  USE_FULL_ASSERT
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  while (1);
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Examples/LL/RCC/RCC_HSI_Output/main.h b/Examples/LL/RCC/RCC_HSI_Output/main.h
new file mode 100644
index 0000000..c3f2be7
--- /dev/null
+++ b/Examples/LL/RCC/RCC_HSI_Output/main.h
@@ -0,0 +1,29 @@
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "py32f0xx_ll_rcc.h"
+#include "py32f0xx_ll_bus.h"
+#include "py32f0xx_ll_system.h"
+#include "py32f0xx_ll_exti.h"
+#include "py32f0xx_ll_cortex.h"
+#include "py32f0xx_ll_utils.h"
+#include "py32f0xx_ll_pwr.h"
+#include "py32f0xx_ll_dma.h"
+#include "py32f0xx_ll_gpio.h"
+
+#if defined(USE_FULL_ASSERT)
+#include "py32_assert.h"
+#endif /* USE_FULL_ASSERT */
+
+
+void APP_ErrorHandler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Examples/LL/RCC/RCC_HSI_Output/py32_assert.h b/Examples/LL/RCC/RCC_HSI_Output/py32_assert.h
new file mode 100644
index 0000000..ce89bb0
--- /dev/null
+++ b/Examples/LL/RCC/RCC_HSI_Output/py32_assert.h
@@ -0,0 +1,31 @@
+#ifndef __PY32_ASSERT_H
+#define __PY32_ASSERT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef  USE_FULL_ASSERT
+
+#include "stdint.h"
+
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PY32_ASSERT_H */
diff --git a/Examples/LL/RCC/RCC_HSI_Output/py32f0xx_it.c b/Examples/LL/RCC/RCC_HSI_Output/py32f0xx_it.c
new file mode 100644
index 0000000..3a10d14
--- /dev/null
+++ b/Examples/LL/RCC/RCC_HSI_Output/py32f0xx_it.c
@@ -0,0 +1,40 @@
+#include "main.h"
+#include "py32f0xx_it.h"
+
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+}
diff --git a/Examples/LL/RCC/RCC_HSI_Output/py32f0xx_it.h b/Examples/LL/RCC/RCC_HSI_Output/py32f0xx_it.h
new file mode 100644
index 0000000..f1403ae
--- /dev/null
+++ b/Examples/LL/RCC/RCC_HSI_Output/py32f0xx_it.h
@@ -0,0 +1,18 @@
+#ifndef __PY32F0XX_IT_H
+#define __PY32F0XX_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PY32F0XX_IT_H */
diff --git a/Examples/LL/RCC/RCC_PLL_Output/main.c b/Examples/LL/RCC/RCC_PLL_Output/main.c
new file mode 100644
index 0000000..95da8e7
--- /dev/null
+++ b/Examples/LL/RCC/RCC_PLL_Output/main.c
@@ -0,0 +1,79 @@
+#include "main.h"
+#include "py32f0xx_bsp_button.h"
+#include "py32f0xx_bsp_led.h"
+#include "py32f0xx_bsp_printf.h"
+
+static void APP_SystemClockConfig(void);
+static void APP_GPIOConfig(void);
+
+int main(void)
+{
+  APP_SystemClockConfig();
+
+  APP_GPIOConfig();
+
+  LL_RCC_ConfigMCO(LL_RCC_MCO1SOURCE_SYSCLK,LL_RCC_MCO1_DIV_1);
+
+  while (1)
+  {
+    LL_mDelay(200);
+    LL_GPIO_TogglePin(GPIOB,LL_GPIO_PIN_5);
+  }
+}
+
+static void APP_SystemClockConfig(void)
+{
+  LL_UTILS_ClkInitTypeDef UTILS_ClkInitStruct;
+
+  LL_RCC_HSI_Enable();
+  LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz);
+  while(LL_RCC_HSI_IsReady() != 1);
+
+  UTILS_ClkInitStruct.AHBCLKDivider = LL_RCC_SYSCLK_DIV_1;
+  UTILS_ClkInitStruct.APB1CLKDivider = LL_RCC_APB1_DIV_1;
+  LL_PLL_ConfigSystemClock_HSI(&UTILS_ClkInitStruct);
+
+  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+  while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL);
+
+  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+  /* Re-init frequency of SysTick source, reload = freq/ticks = 48000000/1000 = 48000 */
+  LL_InitTick(48000000, 1000U);
+  /* Update global SystemCoreClock(or through SystemCoreClockUpdate function) */
+  LL_SetSystemCoreClock(48000000);
+}
+
+static void APP_GPIOConfig(void)
+{
+  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
+  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
+
+  LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_5, LL_GPIO_MODE_OUTPUT);
+
+  /* PA08: MCO output */
+  // Add USE_FULL_LL_DRIVER to LIB_FLAGS to enable LL_GPIO_InitTypeDef
+  LL_GPIO_InitTypeDef GPIO_InitStruct;
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+  /* Alternate mode */
+  GPIO_InitStruct.Alternate = LL_GPIO_AF5_MCO;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+  /* No pull */
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+}
+
+void APP_ErrorHandler(void)
+{
+  while (1);
+}
+
+#ifdef  USE_FULL_ASSERT
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  while (1);
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Examples/LL/RCC/RCC_PLL_Output/main.h b/Examples/LL/RCC/RCC_PLL_Output/main.h
new file mode 100644
index 0000000..c3f2be7
--- /dev/null
+++ b/Examples/LL/RCC/RCC_PLL_Output/main.h
@@ -0,0 +1,29 @@
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "py32f0xx_ll_rcc.h"
+#include "py32f0xx_ll_bus.h"
+#include "py32f0xx_ll_system.h"
+#include "py32f0xx_ll_exti.h"
+#include "py32f0xx_ll_cortex.h"
+#include "py32f0xx_ll_utils.h"
+#include "py32f0xx_ll_pwr.h"
+#include "py32f0xx_ll_dma.h"
+#include "py32f0xx_ll_gpio.h"
+
+#if defined(USE_FULL_ASSERT)
+#include "py32_assert.h"
+#endif /* USE_FULL_ASSERT */
+
+
+void APP_ErrorHandler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Examples/LL/RCC/RCC_PLL_Output/py32_assert.h b/Examples/LL/RCC/RCC_PLL_Output/py32_assert.h
new file mode 100644
index 0000000..ce89bb0
--- /dev/null
+++ b/Examples/LL/RCC/RCC_PLL_Output/py32_assert.h
@@ -0,0 +1,31 @@
+#ifndef __PY32_ASSERT_H
+#define __PY32_ASSERT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef  USE_FULL_ASSERT
+
+#include "stdint.h"
+
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PY32_ASSERT_H */
diff --git a/Examples/LL/RCC/RCC_PLL_Output/py32f0xx_it.c b/Examples/LL/RCC/RCC_PLL_Output/py32f0xx_it.c
new file mode 100644
index 0000000..3a10d14
--- /dev/null
+++ b/Examples/LL/RCC/RCC_PLL_Output/py32f0xx_it.c
@@ -0,0 +1,40 @@
+#include "main.h"
+#include "py32f0xx_it.h"
+
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+}
diff --git a/Examples/LL/RCC/RCC_PLL_Output/py32f0xx_it.h b/Examples/LL/RCC/RCC_PLL_Output/py32f0xx_it.h
new file mode 100644
index 0000000..f1403ae
--- /dev/null
+++ b/Examples/LL/RCC/RCC_PLL_Output/py32f0xx_it.h
@@ -0,0 +1,18 @@
+#ifndef __PY32F0XX_IT_H
+#define __PY32F0XX_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PY32F0XX_IT_H */