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refactor: replace with bsp clock function

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This commit is contained in:
IOsetting 2023-05-01 00:57:19 +08:00
parent 5f3be03480
commit 748c83eac4
1 changed files with 2 additions and 16 deletions
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18
Examples/LL/TIM/TIM1_TimeBase/main.c
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@ -2,16 +2,16 @@
* Demo: TIM1 Update Interrupt * Demo: TIM1 Update Interrupt
*/ */
#include "main.h" #include "main.h"
#include "py32f0xx_bsp_clock.h"
#include "py32f0xx_bsp_printf.h" #include "py32f0xx_bsp_printf.h"
static void APP_GPIOConfig(void); static void APP_GPIOConfig(void);
static void APP_SystemClockConfig(void);
static void APP_TIM1Config(void); static void APP_TIM1Config(void);
int main(void) int main(void)
{ {
APP_SystemClockConfig(); BSP_RCC_HSI_8MConfig();
APP_GPIOConfig(); APP_GPIOConfig();
BSP_USART_Config(115200); BSP_USART_Config(115200);
printf("TIM1 Interrupt Demo\r\nClock: %ld\r\n", SystemCoreClock); printf("TIM1 Interrupt Demo\r\nClock: %ld\r\n", SystemCoreClock);
@ -40,20 +40,6 @@ static void APP_TIM1Config(void)
NVIC_SetPriority(TIM1_BRK_UP_TRG_COM_IRQn,0); NVIC_SetPriority(TIM1_BRK_UP_TRG_COM_IRQn,0);
} }
static void APP_SystemClockConfig(void)
{
LL_RCC_HSI_Enable();
while(LL_RCC_HSI_IsReady() != 1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSISYS);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSISYS);
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_Init1msTick(8000000);
LL_SetSystemCoreClock(8000000);
}
static void APP_GPIOConfig(void) static void APP_GPIOConfig(void)
{ {
/* Set PB5 as GPIO output */ /* Set PB5 as GPIO output */