diff --git a/Examples/LL/LPTIM/LPTIM1_OneShot/main.c b/Examples/LL/LPTIM/LPTIM1_OneShot/main.c
new file mode 100644
index 0000000..a66ea5f
--- /dev/null
+++ b/Examples/LL/LPTIM/LPTIM1_OneShot/main.c
@@ -0,0 +1,69 @@
+/**
+ * Demo Of Low Power TIM
+*/
+#include "main.h"
+#include "py32f0xx_bsp_clock.h"
+#include "py32f0xx_bsp_printf.h"
+
+static void APP_GPIO_Config(void);
+static void APP_ConfigLPTIMOneShot(void);
+
+int main(void)
+{
+  // Set HSI 8MHz as system clock source
+  BSP_RCC_HSI_8MConfig();
+  // Initialize UART on PA2:TX PA3:RX
+  BSP_USART_Config(115200);
+  printf("PY32F0 Low Power TIM Demo\r\nClock: %ld\r\n", SystemCoreClock);
+
+  APP_GPIO_Config();
+
+  APP_ConfigLPTIMOneShot();
+
+  while (1);
+}
+
+static void APP_GPIO_Config(void)
+{
+  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
+  LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_5, LL_GPIO_MODE_OUTPUT);
+}
+
+static void APP_ConfigLPTIMOneShot(void)
+{
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPTIM1);
+  // Prescaler = 64
+  LL_LPTIM_SetPrescaler(LPTIM1, LL_LPTIM_PRESCALER_DIV64);
+  LL_LPTIM_SetUpdateMode(LPTIM1, LL_LPTIM_UPDATE_MODE_ENDOFPERIOD);
+  LL_LPTIM_EnableIT_ARRM(LPTIM1);
+  LL_LPTIM_Enable(LPTIM1);
+
+  // 8000000/64/62500 = 2Hz
+  LL_LPTIM_SetAutoReload(LPTIM1, 62500);
+  LL_LPTIM_StartCounter(LPTIM1, LL_LPTIM_OPERATING_MODE_ONESHOT);
+
+  NVIC_EnableIRQ(LPTIM1_IRQn);
+  NVIC_SetPriority(LPTIM1_IRQn, 0);
+}
+
+void LPTIM1_IRQHandler(void)
+{
+  if (LL_LPTIM_IsActiveFlag_ARRM(LPTIM))
+  {
+    LL_LPTIM_ClearFLAG_ARRM(LPTIM);
+    LL_GPIO_TogglePin(GPIOB, LL_GPIO_PIN_5);
+    LL_LPTIM_StartCounter(LPTIM1, LL_LPTIM_OPERATING_MODE_ONESHOT);
+  }
+}
+
+void APP_ErrorHandler(void)
+{
+  while (1);
+}
+
+#ifdef  USE_FULL_ASSERT
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  while (1);
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Examples/LL/LPTIM/LPTIM1_OneShot/main.h b/Examples/LL/LPTIM/LPTIM1_OneShot/main.h
new file mode 100644
index 0000000..5a96e01
--- /dev/null
+++ b/Examples/LL/LPTIM/LPTIM1_OneShot/main.h
@@ -0,0 +1,28 @@
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "py32f0xx_ll_rtc.h"
+#include "py32f0xx_ll_bus.h"
+#include "py32f0xx_ll_cortex.h"
+#include "py32f0xx_ll_dma.h"
+#include "py32f0xx_ll_exti.h"
+#include "py32f0xx_ll_gpio.h"
+#include "py32f0xx_ll_lptim.h"
+#include "py32f0xx_ll_pwr.h"
+#include "py32f0xx_ll_rcc.h"
+#include "py32f0xx_ll_system.h"
+#include "py32f0xx_ll_tim.h"
+#include "py32f0xx_ll_utils.h"
+
+
+void APP_ErrorHandler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Examples/LL/LPTIM/LPTIM1_OneShot/py32f0xx_it.c b/Examples/LL/LPTIM/LPTIM1_OneShot/py32f0xx_it.c
new file mode 100644
index 0000000..458707c
--- /dev/null
+++ b/Examples/LL/LPTIM/LPTIM1_OneShot/py32f0xx_it.c
@@ -0,0 +1,42 @@
+#include "main.h"
+#include "py32f0xx_it.h"
+
+extern void APP_TransferCompleteCallback(void);
+
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+}
diff --git a/Examples/LL/LPTIM/LPTIM1_OneShot/py32f0xx_it.h b/Examples/LL/LPTIM/LPTIM1_OneShot/py32f0xx_it.h
new file mode 100644
index 0000000..f1403ae
--- /dev/null
+++ b/Examples/LL/LPTIM/LPTIM1_OneShot/py32f0xx_it.h
@@ -0,0 +1,18 @@
+#ifndef __PY32F0XX_IT_H
+#define __PY32F0XX_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PY32F0XX_IT_H */