From caa0f4e96bb29037c59841db5d1a99a8fa60adfa Mon Sep 17 00:00:00 2001 From: IOsetting Date: Wed, 5 Apr 2023 09:36:08 +0800 Subject: [PATCH] feat: add separate pwm examples for py32f002a --- Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.c | 78 ++++++++++++++ Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.h | 25 +++++ .../TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.c | 40 +++++++ .../TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.h | 18 ++++ .../main.c | 101 ++++++++++++++++++ .../main.h | 27 +++++ .../py32f0xx_it.c | 40 +++++++ .../py32f0xx_it.h | 19 ++++ 8 files changed, 348 insertions(+) create mode 100644 Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.c create mode 100644 Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.h create mode 100644 Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.c create mode 100644 Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.h create mode 100644 Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/main.c create mode 100644 Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/main.h create mode 100644 Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/py32f0xx_it.c create mode 100644 Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/py32f0xx_it.h diff --git a/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.c b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.c new file mode 100644 index 0000000..b58b192 --- /dev/null +++ b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.c @@ -0,0 +1,78 @@ +/*** + * Demo: TIM1 PWM output + * + * Board: PY32F002AF15P + */ +#include "main.h" +#include "py32f0xx_bsp_clock.h" +#include "py32f0xx_bsp_printf.h" + +static void APP_TIM1Config(void); +static void APP_PWMChannelConfig(void); + + +int main(void) +{ + BSP_RCC_HSI_24MConfig(); + BSP_USART_Config(115200); + printf("PY32F002AF15P TIM1 PWM Demo\r\nClock: %ld\r\n", SystemCoreClock); + + APP_TIM1Config(); + APP_PWMChannelConfig(); + while (1); +} + +static void APP_PWMChannelConfig(void) +{ + LL_GPIO_InitTypeDef GPIO_InitTypeDef; + LL_TIM_OC_InitTypeDef TIM_OC_Initstruct; + + LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA | LL_IOP_GRP1_PERIPH_GPIOB); + + /* PA0:AF13->TIM1_CH3, PA1:AF13->TIM1_CH4 */ + GPIO_InitTypeDef.Pin = LL_GPIO_PIN_0 | LL_GPIO_PIN_1; + GPIO_InitTypeDef.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitTypeDef.Alternate = LL_GPIO_AF_13; + LL_GPIO_Init(GPIOA, &GPIO_InitTypeDef); + + /* PB3:AF1->TIM1_CH2 */ + GPIO_InitTypeDef.Pin = LL_GPIO_PIN_3; + GPIO_InitTypeDef.Alternate = LL_GPIO_AF_1; + LL_GPIO_Init(GPIOB, &GPIO_InitTypeDef); + + TIM_OC_Initstruct.OCMode = LL_TIM_OCMODE_PWM2; + TIM_OC_Initstruct.OCState = LL_TIM_OCSTATE_ENABLE; + TIM_OC_Initstruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH; + TIM_OC_Initstruct.OCIdleState = LL_TIM_OCIDLESTATE_LOW; + + /* Set channel compare values */ + TIM_OC_Initstruct.CompareValue = 250; + LL_TIM_OC_Init(TIM1, LL_TIM_CHANNEL_CH4, &TIM_OC_Initstruct); + TIM_OC_Initstruct.CompareValue = 500; + LL_TIM_OC_Init(TIM1, LL_TIM_CHANNEL_CH2, &TIM_OC_Initstruct); + TIM_OC_Initstruct.CompareValue = 750; + LL_TIM_OC_Init(TIM1, LL_TIM_CHANNEL_CH3, &TIM_OC_Initstruct); +} + +static void APP_TIM1Config(void) +{ + LL_TIM_InitTypeDef TIM1CountInit = {0}; + + LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM1); + + TIM1CountInit.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + TIM1CountInit.CounterMode = LL_TIM_COUNTERMODE_UP; + TIM1CountInit.Prescaler = 2400-1; + /* PWM period = 1000 */ + TIM1CountInit.Autoreload = 1000-1; + TIM1CountInit.RepetitionCounter = 0; + LL_TIM_Init(TIM1,&TIM1CountInit); + + LL_TIM_EnableAllOutputs(TIM1); + LL_TIM_EnableCounter(TIM1); +} + +void APP_ErrorHandler(void) +{ + while (1); +} diff --git a/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.h b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.h new file mode 100644 index 0000000..4d57498 --- /dev/null +++ b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/main.h @@ -0,0 +1,25 @@ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "py32f0xx_ll_adc.h" +#include "py32f0xx_ll_bus.h" +#include "py32f0xx_ll_cortex.h" +#include "py32f0xx_ll_dma.h" +#include "py32f0xx_ll_exti.h" +#include "py32f0xx_ll_gpio.h" +#include "py32f0xx_ll_pwr.h" +#include "py32f0xx_ll_rcc.h" +#include "py32f0xx_ll_system.h" +#include "py32f0xx_ll_tim.h" +#include "py32f0xx_ll_utils.h" + + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ diff --git a/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.c b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.c new file mode 100644 index 0000000..3a10d14 --- /dev/null +++ b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.c @@ -0,0 +1,40 @@ +#include "main.h" +#include "py32f0xx_it.h" + +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + while (1) + { + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ +} diff --git a/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.h b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.h new file mode 100644 index 0000000..f1403ae --- /dev/null +++ b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM/py32f0xx_it.h @@ -0,0 +1,18 @@ +#ifndef __PY32F0XX_IT_H +#define __PY32F0XX_IT_H + +#ifdef __cplusplus +extern "C" { +#endif + +void NMI_Handler(void); +void HardFault_Handler(void); +void SVC_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __PY32F0XX_IT_H */ diff --git a/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/main.c b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/main.c new file mode 100644 index 0000000..c1ccacf --- /dev/null +++ b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/main.c @@ -0,0 +1,101 @@ +/*** + * Demo: TIM1 PWM Complementary + * + * Board: PY32F002AF15P + * + * PB3:AF1-> TIM1_CH2, PB0:AF2-> TIM1_CH2N + * PB6:AF1-> TIM1_CH3, PB1:AF2-> TIM1_CH3N + */ +#include "main.h" +#include "py32f0xx_bsp_clock.h" +#include "py32f0xx_bsp_printf.h" + +static void APP_PWMChannelConfig(void); +static void APP_TIM1BaseConfig(void); + +int main(void) +{ + uint16_t comp1 = 1000, comp2 = 0; + BSP_RCC_HSI_24MConfig(); + + BSP_USART_Config(115200); + printf("TIM1 PWM Complementary Demo\r\nClock: %ld \r\n", SystemCoreClock); + + APP_TIM1BaseConfig(); + APP_PWMChannelConfig(); + + while (1) + { + /* Change the duty cycle of CH2 and CH3 */ + LL_TIM_OC_SetCompareCH2(TIM1, comp1--); + LL_TIM_OC_SetCompareCH3(TIM1, comp2++); + if (comp1 == 0) comp1 = 1000; + if (comp2 == 1000) comp2 = 0; + LL_mDelay(1); + } +} + +static void APP_PWMChannelConfig(void) +{ + LL_GPIO_InitTypeDef GPIO_InitTypeDef; + LL_TIM_OC_InitTypeDef TIM_OC_Initstruct; + + LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB); + /** + * PB3:AF1-> TIM1_CH2 + * PB6:AF1-> TIM1_CH3 + */ + GPIO_InitTypeDef.Pin = LL_GPIO_PIN_3|LL_GPIO_PIN_6; + GPIO_InitTypeDef.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitTypeDef.Alternate = LL_GPIO_AF_1; + LL_GPIO_Init(GPIOB, &GPIO_InitTypeDef); + /** + * PB0:AF2-> TIM1_CH2N + * PB1:AF2-> TIM1_CH3N + */ + GPIO_InitTypeDef.Pin = LL_GPIO_PIN_0|LL_GPIO_PIN_1; + GPIO_InitTypeDef.Alternate = LL_GPIO_AF_2; + LL_GPIO_Init(GPIOB, &GPIO_InitTypeDef); + + TIM_OC_Initstruct.OCMode = LL_TIM_OCMODE_PWM1; + TIM_OC_Initstruct.OCState = LL_TIM_OCSTATE_ENABLE; + TIM_OC_Initstruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH; + TIM_OC_Initstruct.OCIdleState = LL_TIM_OCIDLESTATE_LOW; + TIM_OC_Initstruct.OCNState = LL_TIM_OCSTATE_ENABLE; + TIM_OC_Initstruct.OCNPolarity = LL_TIM_OCPOLARITY_HIGH; + TIM_OC_Initstruct.OCNIdleState = LL_TIM_OCIDLESTATE_LOW; + + TIM_OC_Initstruct.CompareValue = 500; + LL_TIM_OC_Init(TIM1,LL_TIM_CHANNEL_CH2,&TIM_OC_Initstruct); + + TIM_OC_Initstruct.CompareValue = 950; + LL_TIM_OC_Init(TIM1,LL_TIM_CHANNEL_CH3,&TIM_OC_Initstruct); +} + +static void APP_TIM1BaseConfig(void) +{ + LL_TIM_InitTypeDef TIM1CountInit; + + LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM1); + + TIM1CountInit.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + TIM1CountInit.CounterMode = LL_TIM_COUNTERMODE_UP; + TIM1CountInit.Prescaler = 24-1; + TIM1CountInit.Autoreload = 1000-1; + TIM1CountInit.RepetitionCounter = 0; + LL_TIM_Init(TIM1,&TIM1CountInit); + LL_TIM_EnableAllOutputs(TIM1); + LL_TIM_EnableCounter(TIM1); +} + +void APP_ErrorHandler(void) +{ + while (1); +} + +#ifdef USE_FULL_ASSERT +void assert_failed(uint8_t *file, uint32_t line) +{ + while (1); +} +#endif /* USE_FULL_ASSERT */ diff --git a/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/main.h b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/main.h new file mode 100644 index 0000000..fe3863f --- /dev/null +++ b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/main.h @@ -0,0 +1,27 @@ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "py32f0xx_ll_adc.h" +#include "py32f0xx_ll_bus.h" +#include "py32f0xx_ll_cortex.h" +#include "py32f0xx_ll_dma.h" +#include "py32f0xx_ll_exti.h" +#include "py32f0xx_ll_gpio.h" +#include "py32f0xx_ll_pwr.h" +#include "py32f0xx_ll_rcc.h" +#include "py32f0xx_ll_system.h" +#include "py32f0xx_ll_tim.h" +#include "py32f0xx_ll_utils.h" + + +void APP_ErrorHandler(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ diff --git a/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/py32f0xx_it.c b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/py32f0xx_it.c new file mode 100644 index 0000000..3a10d14 --- /dev/null +++ b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/py32f0xx_it.c @@ -0,0 +1,40 @@ +#include "main.h" +#include "py32f0xx_it.h" + +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + while (1) + { + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ +} diff --git a/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/py32f0xx_it.h b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/py32f0xx_it.h new file mode 100644 index 0000000..76b3dad --- /dev/null +++ b/Examples/LL/TIM/PY32F002AF15P_TIM1_PWM_Complementary/py32f0xx_it.h @@ -0,0 +1,19 @@ +#ifndef __PY32F0XX_IT_H +#define __PY32F0XX_IT_H + +#ifdef __cplusplus +extern "C" { +#endif + +void NMI_Handler(void); +void HardFault_Handler(void); +void SVC_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + + +#ifdef __cplusplus +} +#endif + +#endif /* __PY32F0XX_IT_H */