refactor: rewrite adc dma example

This commit is contained in:
IOsetting 2023-02-16 22:11:01 +08:00
parent 7ed199ed05
commit f2634a8d71
5 changed files with 104 additions and 138 deletions

View File

@ -1,61 +1,62 @@
#include "main.h" #include "main.h"
#include "py32f0xx_bsp_clock.h"
#include "py32f0xx_bsp_printf.h" #include "py32f0xx_bsp_printf.h"
#define ADC_CALIBRATION_TIMEOUT_MS ((uint32_t) 1)
#define VDDA_APPLI ((uint32_t)3300) #define VDDA_APPLI ((uint32_t)3300)
#define VAR_CONVERTED_DATA_INIT_VALUE (__LL_ADC_DIGITAL_SCALE(LL_ADC_RESOLUTION_12B) + 1)
/* Private variables ---------------------------------------------------------*/
__IO uint32_t ubUserButtonPressed = 0;
__IO uint16_t uhADCxConvertedData = VAR_CONVERTED_DATA_INIT_VALUE;
__IO uint16_t uhADCxConvertedData_Voltage_mVolt = 0; __IO uint16_t uhADCxConvertedData_Voltage_mVolt = 0;
static uint32_t ADCxConvertedDatas; static uint32_t ADCxConvertedDatas;
static void APP_ADCConfig(void);
static void APP_SystemClockConfig(void);
static void APP_AdcCalibrate(void);
static void APP_AdcConfig(void);
static void APP_GPIOConfig(void);
static void APP_TimerInit(void); static void APP_TimerInit(void);
static void APP_DmaConfig(void); static void APP_DMAConfig(void);
int main(void) int main(void)
{ {
APP_SystemClockConfig(); BSP_HSI_48MConfig();
APP_GPIOConfig();
BSP_USART_Config(115200); BSP_USART_Config(115200);
printf("ADC Timer Trigger DMA Demo\r\nClock: %ld \r\n", SystemCoreClock); printf("ADC Timer Trigger DMA Demo\r\nClock: %ld\r\n", SystemCoreClock);
APP_DmaConfig(); APP_DMAConfig();
APP_ADCConfig();
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1); // Start ADC regular conversion and wait for next external trigger
LL_ADC_Reset(ADC1);
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_ADC1);
APP_AdcCalibrate();
APP_AdcConfig();
LL_ADC_Enable(ADC1);
/* Delay 1ms(>= 8 ADC Clock) to ensure ADC is stable */
LL_mDelay(1);
LL_ADC_REG_StartConversion(ADC1); LL_ADC_REG_StartConversion(ADC1);
APP_TimerInit(); APP_TimerInit();
while (1) while (1);
{
LL_GPIO_TogglePin(GPIOB, LL_GPIO_PIN_5);
LL_mDelay(1000);
}
} }
static void APP_AdcConfig(void) static void APP_ADCConfig(void)
{ {
__IO uint32_t backup_setting_adc_dma_transfer = 0;
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_ADC1);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
LL_ADC_Reset(ADC1);
// Calibrate start
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Backup current settings */
backup_setting_adc_dma_transfer = LL_ADC_REG_GetDMATransfer(ADC1);
/* Turn off DMA when calibrating */
LL_ADC_REG_SetDMATransfer(ADC1, LL_ADC_REG_DMA_TRANSFER_NONE);
LL_ADC_StartCalibration(ADC1);
while (LL_ADC_IsCalibrationOnGoing(ADC1) != 0);
/* Delay 1ms(>= 4 ADC clocks) before re-enable ADC */
LL_mDelay(1);
/* Apply saved settings */
LL_ADC_REG_SetDMATransfer(ADC1, backup_setting_adc_dma_transfer);
}
// Calibrate end
/* PA4 as ADC input */ /* PA4 as ADC input */
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG); LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG);
/* Set ADC channel and clock source when ADEN=0, set other configurations when ADSTART=0 */ /* Set ADC channel and clock source when ADEN=0, set other configurations when ADSTART=0 */
LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_NONE); LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_NONE);
@ -74,78 +75,50 @@ static void APP_AdcConfig(void)
LL_ADC_REG_SetOverrun(ADC1, LL_ADC_REG_OVR_DATA_OVERWRITTEN); LL_ADC_REG_SetOverrun(ADC1, LL_ADC_REG_OVR_DATA_OVERWRITTEN);
LL_ADC_REG_SetSequencerDiscont(ADC1, LL_ADC_REG_SEQ_DISCONT_DISABLE); LL_ADC_REG_SetSequencerDiscont(ADC1, LL_ADC_REG_SEQ_DISCONT_DISABLE);
LL_ADC_REG_SetSequencerChannels(ADC1, LL_ADC_CHANNEL_4); LL_ADC_REG_SetSequencerChannels(ADC1, LL_ADC_CHANNEL_4);
}
static void APP_AdcCalibrate(void) LL_ADC_Enable(ADC1);
{
__IO uint32_t backup_setting_adc_dma_transfer = 0;
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0;
#endif
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Backup current settings */
backup_setting_adc_dma_transfer = LL_ADC_REG_GetDMATransfer(ADC1);
/* Turn off DMA when calibrating */
LL_ADC_REG_SetDMATransfer(ADC1, LL_ADC_REG_DMA_TRANSFER_NONE);
LL_ADC_StartCalibration(ADC1);
#if (USE_TIMEOUT == 1)
Timeout = ADC_CALIBRATION_TIMEOUT_MS;
#endif
while (LL_ADC_IsCalibrationOnGoing(ADC1) != 0)
{
#if (USE_TIMEOUT == 1)
/* 检测校准是否超时 */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
}
}
#endif
}
/* Delay 1ms(>= 4 ADC clocks) before re-enable ADC */
LL_mDelay(1);
/* Apply saved settings */
LL_ADC_REG_SetDMATransfer(ADC1, backup_setting_adc_dma_transfer);
}
} }
static void APP_TimerInit(void) static void APP_TimerInit(void)
{ {
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM1); LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM1);
/* Set period to 48000000 for 48MHz clock */ /* Set period to 48000000 for 48MHz clock */
LL_TIM_SetPrescaler(TIM1, 6000); LL_TIM_SetPrescaler(TIM1, 6000 - 1);
LL_TIM_SetAutoReload(TIM1, 8000); LL_TIM_SetAutoReload(TIM1, 8000 - 1);
/* Triggered by update */ /* Triggered by update */
LL_TIM_SetTriggerOutput(TIM1, LL_TIM_TRGO_UPDATE); LL_TIM_SetTriggerOutput(TIM1, LL_TIM_TRGO_UPDATE);
LL_TIM_EnableCounter(TIM1); LL_TIM_EnableCounter(TIM1);
} }
static void APP_DmaConfig(void) static void APP_DMAConfig(void)
{ {
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG); LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG);
/* ADC -> LL_DMA_CHANNEL_1 */ // Remap ADC to LL_DMA_CHANNEL_1
SET_BIT(SYSCFG->CFGR3, 0x0); LL_SYSCFG_SetDMARemap_CH1(LL_SYSCFG_DMA_MAP_ADC);
// Transfer from peripheral to memory
LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY); LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
// Set priority
LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_HIGH); LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_HIGH);
// Circular mode
LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MODE_CIRCULAR); LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MODE_CIRCULAR);
// Peripheral address no increment
LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_NOINCREMENT); LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_NOINCREMENT);
// Memory address no increment
LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_NOINCREMENT); LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_NOINCREMENT);
// Peripheral data alignment : Word
LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_WORD); LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_WORD);
// Memory data alignment : Word
LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_WORD); LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_WORD);
// Data length
LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_1, 1); LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_1, 1);
// Sorce and target address
LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_1, (uint32_t)&ADC1->DR, (uint32_t)&ADCxConvertedDatas, LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1)); LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_1, (uint32_t)&ADC1->DR, (uint32_t)&ADCxConvertedDatas, LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1));
/* Enable transfer-complete interrupt */ // Enable DMA channel 1
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
// Enable transfer-complete interrupt
LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1); LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1);
NVIC_SetPriority(DMA1_Channel1_IRQn, 0); NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
@ -156,30 +129,7 @@ void APP_TransferCompleteCallback(void)
{ {
/* Convert the adc value to voltage value */ /* Convert the adc value to voltage value */
uhADCxConvertedData_Voltage_mVolt = __LL_ADC_CALC_DATA_TO_VOLTAGE(VDDA_APPLI, ADCxConvertedDatas, LL_ADC_RESOLUTION_12B); uhADCxConvertedData_Voltage_mVolt = __LL_ADC_CALC_DATA_TO_VOLTAGE(VDDA_APPLI, ADCxConvertedDatas, LL_ADC_RESOLUTION_12B);
printf("%s%s%d mV\r\n","Channel4","Voltage:",uhADCxConvertedData_Voltage_mVolt); printf("Channel4 voltage %d mV\r\n", uhADCxConvertedData_Voltage_mVolt);
}
static void APP_SystemClockConfig(void)
{
LL_UTILS_ClkInitTypeDef UTILS_ClkInitStruct;
LL_RCC_HSI_Enable();
/* Change this value to adjust clock frequency, larger is faster */
LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz + 15);
while (LL_RCC_HSI_IsReady() != 1);
UTILS_ClkInitStruct.AHBCLKDivider = LL_RCC_SYSCLK_DIV_1;
UTILS_ClkInitStruct.APB1CLKDivider = LL_RCC_APB1_DIV_1;
LL_PLL_ConfigSystemClock_HSI(&UTILS_ClkInitStruct);
/* Re-init frequency of SysTick source, reload = freq/ticks = 48000000/1000 = 48000 */
LL_InitTick(48000000, 1000U);
}
static void APP_GPIOConfig(void)
{
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_5, LL_GPIO_MODE_OUTPUT);
} }
void APP_ErrorHandler(void) void APP_ErrorHandler(void)

View File

@ -18,11 +18,6 @@ extern "C" {
#include "py32f0xx_ll_utils.h" #include "py32f0xx_ll_utils.h"
#if defined(USE_FULL_ASSERT)
#include "py32_assert.h"
#endif /* USE_FULL_ASSERT */
void APP_ErrorHandler(void); void APP_ErrorHandler(void);
#ifdef __cplusplus #ifdef __cplusplus

View File

@ -1,31 +0,0 @@
#ifndef __PY32_ASSERT_H
#define __PY32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef USE_FULL_ASSERT
#include "stdint.h"
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __PY32_ASSERT_H */

View File

@ -0,0 +1,33 @@
/**
******************************************************************************
* @file py32f0xx_bsp_clock.h
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef PY32F003_BSP_CLOCK_H
#define PY32F003_BSP_CLOCK_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include "py32f0xx_ll_rcc.h"
#include "py32f0xx_ll_bus.h"
#include "py32f0xx_ll_system.h"
#include "py32f0xx_ll_exti.h"
#include "py32f0xx_ll_cortex.h"
#include "py32f0xx_ll_utils.h"
#include "py32f0xx_ll_pwr.h"
#include "py32f0xx_ll_dma.h"
#include "py32f0xx_ll_gpio.h"
#include "py32f0xx_ll_usart.h"
void BSP_HSI_48MConfig(void);
#ifdef __cplusplus
}
#endif
#endif /* PY32F003_BSP_CLOCK_H */

View File

@ -0,0 +1,19 @@
#include "py32f0xx_bsp_clock.h"
void BSP_HSI_48MConfig(void)
{
LL_UTILS_ClkInitTypeDef UTILS_ClkInitStruct;
LL_RCC_HSI_Enable();
/* Change this value to adjust clock frequency, larger is faster */
LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz);
while (LL_RCC_HSI_IsReady() != 1);
UTILS_ClkInitStruct.AHBCLKDivider = LL_RCC_SYSCLK_DIV_1;
UTILS_ClkInitStruct.APB1CLKDivider = LL_RCC_APB1_DIV_1;
LL_PLL_ConfigSystemClock_HSI(&UTILS_ClkInitStruct);
/* Re-init frequency of SysTick source, reload = freq/ticks = 48000000/1000 = 48000 */
LL_InitTick(48000000, 1000U);
}