mirror of
https://github.com/IcedRooibos/py32f0-template.git
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297 lines
11 KiB
C
297 lines
11 KiB
C
/**
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******************************************************************************
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* @file py32f0xx_hal.h
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* @author MCU Application Team
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* @brief This file contains all the functions prototypes for the HAL
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* module driver.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) Puya Semiconductor Co.
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* All rights reserved.</center></h2>
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __PY32F0xx_HAL_H
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#define __PY32F0xx_HAL_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "py32f0xx_hal_conf.h"
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/** @addtogroup PY32F0xx_HAL_Driver
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* @{
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*/
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/** @addtogroup HAL
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* @{
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup HAL_Exported_Constants HAL Exported Constants
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* @{
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*/
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/** @defgroup HAL_TICK_FREQ Tick Frequency
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* @{
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*/
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typedef enum
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{
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HAL_TICK_FREQ_10HZ = 100U,
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HAL_TICK_FREQ_100HZ = 10U,
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HAL_TICK_FREQ_1KHZ = 1U,
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HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
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} HAL_TickFreqTypeDef;
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/**
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* @}
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*/
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/* Exported types ------------------------------------------------------------*/
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extern uint32_t uwTickPrio;
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extern uint32_t uwTickFreq;
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/** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants
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* @{
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*/
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/** @defgroup SYSCFG_BootMode Boot Mode
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* @{
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*/
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#define SYSCFG_BOOT_MAINFLASH 0x00000000U /*!< Main Flash memory mapped at 0x0000 0000 */
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#define SYSCFG_BOOT_SYSTEMFLASH SYSCFG_CFGR1_MEM_MODE_0 /*!< System Flash memory mapped at 0x0000 0000 */
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#define SYSCFG_BOOT_SRAM (SYSCFG_CFGR1_MEM_MODE_1 | SYSCFG_CFGR1_MEM_MODE_0) /*!< Embedded SRAM mapped at 0x0000 0000 */
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup HAL_Exported_Macros HAL Exported Macros
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* @{
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*/
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/** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
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* @brief Freeze/Unfreeze Peripherals in Debug mode
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* Note:
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* Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
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* debug mode (not accessible by the user software in normal mode).
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* Refer to errata sheet of these devices for more details.
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* @{
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*/
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/* Peripherals on APB1 */
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup HAL_Exported_Macros HAL Exported Macros
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* @{
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*/
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/** @defgroup HAL_Freeze_Unfreeze_Peripherals HAL Freeze Unfreeze Peripherals
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* @brief Freeze/Unfreeze Peripherals in Debug mode
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* @{
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*/
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#if defined(DBGMCU_APB_FZ1_DBG_RTC_STOP)
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#define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_RTC_STOP))
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#define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_RTC_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_RTC_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_I2C_SMBUS_TIMEOUT)
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#define __HAL_DBGMCU_FREEZE_I2C_TIMEOUT() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_I2C_SMBUS_TIMEOUT))
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#define __HAL_DBGMCU_UNFREEZE_I2C_TIMEOUT() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_I2C_SMBUS_TIMEOUT))
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#endif /* DBGMCU_APB_FZ_DBG_I2C_SMBUS_TIMEOUT */
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#if defined(DBGMCU_APB_FZ1_DBG_IWDG_STOP)
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#define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_IWDG_STOP))
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#define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_IWDG_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_IWDG_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_WWDG_STOP)
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#define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_WWDG_STOP))
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#define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_WWDG_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_WWDG_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM2_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM2_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM2_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM2_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM3_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM3_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM3_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM3_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM6_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM6_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM6_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM6_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM7_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM7_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM7_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM7_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM14_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM14_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM14_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM14_STOP */
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#if defined(DBGMCU_APB_FZ2_DBG_TIM1_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APBFZ2 |= (DBGMCU_APB_FZ2_DBG_TIM1_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APBFZ2 &= ~(DBGMCU_APB_FZ2_DBG_TIM1_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM1_STOP */
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#if defined(DBGMCU_APB_FZ2_DBG_TIM15_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM15() (DBGMCU->APBFZ2 |= (DBGMCU_APB_FZ2_DBG_TIM15_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM15() (DBGMCU->APBFZ2 &= ~(DBGMCU_APB_FZ2_DBG_TIM15_STOP))
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#endif /* DBGMCU_APB_FZ2_DBG_TIM15_STOP */
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#if defined(DBGMCU_APB_FZ2_DBG_TIM16_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM16() (DBGMCU->APBFZ2 |= (DBGMCU_APB_FZ2_DBG_TIM16_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM16() (DBGMCU->APBFZ2 &= ~(DBGMCU_APB_FZ2_DBG_TIM16_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM16_STOP */
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#if defined(DBGMCU_APB_FZ2_DBG_TIM17_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM17() (DBGMCU->APBFZ2 |= (DBGMCU_APB_FZ2_DBG_TIM17_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM17() (DBGMCU->APBFZ2 &= ~(DBGMCU_APB_FZ2_DBG_TIM17_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM17_STOP */
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/**
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* @}
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*/
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/** @defgroup HAL_Private_Macros HAL Private Macros
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* @{
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*/
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#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
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((FREQ) == HAL_TICK_FREQ_100HZ) || \
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((FREQ) == HAL_TICK_FREQ_1KHZ))
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/** @brief SYSCFG Break Cortex-M0+ Lockup lock.
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* Enables and locks the connection of Cortex-M0+ LOCKUP (Hardfault) output to TIM1/15/16/17 Break input
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* @note The selected configuration is locked and can be unlocked only by system reset.
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*/
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#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_LOCKUP_LOCK)
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#if defined(SYSCFG_CFGR2_PVD_LOCK)
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/** @brief SYSCFG Break PVD lock.
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* Enables and locks the PVD connection with Timer1/15/16/17 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR register
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* @note The selected configuration is locked and can be unlocked only by system reset
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*/
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#define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_PVD_LOCK)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_BRK_TIM1)
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/** @brief SYSCFG COMP1 AS TIMx break.
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* COMP1 as Timer1Break input
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* @note The selected configuration is locked and can be unlocked only by system reset
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*/
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#define __HAL_SYSCFG_COMP1_BREAK_TIM1() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_BRK_TIM1)
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#endif
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#if defined(SYSCFG_CFGR2_COMP2_BRK_TIM1)
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#define __HAL_SYSCFG_COMP2_BREAK_TIM1() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_BRK_TIM1)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_BRK_TIM16)
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#define __HAL_SYSCFG_COMP1_BREAK_TIM16() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_BRK_TIM16)
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#endif
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#if defined(SYSCFG_CFGR2_COMP2_BRK_TIM16)
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#define __HAL_SYSCFG_COMP2_BREAK_TIM16() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_BRK_TIM16)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_BRK_TIM17)
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#define __HAL_SYSCFG_COMP1_BREAK_TIM17() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_BRK_TIM17)
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#endif
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#if defined(SYSCFG_CFGR2_COMP2_BRK_TIM17)
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#define __HAL_SYSCFG_COMP2_BREAK_TIM17() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_BRK_TIM17)
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#endif
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/* Initialization and de-initialization functions ******************************/
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HAL_StatusTypeDef HAL_Init(void);
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HAL_StatusTypeDef HAL_DeInit(void);
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void HAL_MspInit(void);
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void HAL_MspDeInit(void);
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HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
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/**
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* @}
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*/
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/** @addtogroup HAL_Exported_Functions_Group2
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* @{
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*/
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/* Peripheral Control functions ************************************************/
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void HAL_IncTick(void);
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void HAL_Delay(uint32_t Delay);
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uint32_t HAL_GetTick(void);
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uint32_t HAL_GetTickPrio(void);
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HAL_StatusTypeDef HAL_SetTickFreq(uint32_t Freq);
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uint32_t HAL_GetTickFreq(void);
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void HAL_SuspendTick(void);
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void HAL_ResumeTick(void);
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uint32_t HAL_GetHalVersion(void);
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uint32_t HAL_GetREVID(void);
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uint32_t HAL_GetDEVID(void);
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uint32_t HAL_GetUIDw0(void);
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uint32_t HAL_GetUIDw1(void);
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uint32_t HAL_GetUIDw2(void);
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void HAL_DBGMCU_EnableDBGSleepMode(void);
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void HAL_DBGMCU_DisableDBGSleepMode(void);
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void HAL_DBGMCU_EnableDBGStopMode(void);
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void HAL_DBGMCU_DisableDBGStopMode(void);
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#if (defined(DMA)||defined(DMA1))
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void HAL_SYSCFG_DMA_Req(uint32_t Requset);
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#endif
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/** @defgroup HAL_Private_Variables HAL Private Variables
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* @{
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*/
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/**
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* @}
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*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup HAL_Private_Constants HAL Private Constants
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* @{
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*/
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PY32F0xx_HAL_H */
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/************************ (C) COPYRIGHT Puya *****END OF FILE****/
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