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https://github.com/IcedRooibos/py32f0-template.git
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257 lines
9.2 KiB
ArmAsm
Executable File
257 lines
9.2 KiB
ArmAsm
Executable File
;******************************************************************************
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;* @file : startup_py32f003xx.s
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;* @brief : PY32F003xx devices vector table for EWARM toolchain.
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;* This module performs:
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;* - Set the initial SP
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;* - Set the initial PC == __iar_program_start
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;* - Set the vector table entries with the exceptions ISR address
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;* - Branches to __main in the C library (which eventually
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;* calls main()).
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;* After Reset the CortexM0+ processor is in Thread mode,
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;* priority is Privileged, and the Stack is set to Main.
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;******************************************************************************
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;* @attention
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;*
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;* <h2><center>© Copyright (c) Puya Semiconductor Co.
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;* All rights reserved.</center></h2>
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;*
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;* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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;* All rights reserved.</center></h2>
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;*
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;* This software component is licensed by ST under BSD 3-Clause license,
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;* the "License"; You may not use this file except in compliance with the
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;* License. You may obtain a copy of the License at:
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;* opensource.org/licenses/BSD-3-Clause
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;*
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;******************************************************************************
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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;
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; Cortex-M version
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;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(2)
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EXTERN __iar_program_start
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EXTERN SystemInit
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PUBLIC __vector_table
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DATA
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__vector_table
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DCD sfe(CSTACK) ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD WWDG_IRQHandler ; 0Window Watchdog
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DCD PVD_IRQHandler ; 1PVD through EXTI Line detect
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DCD RTC_IRQHandler ; 2RTC through EXTI Line
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DCD FLASH_IRQHandler ; 3FLASH
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DCD RCC_IRQHandler ; 4RCC
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DCD EXTI0_1_IRQHandler ; 5EXTI Line 0 and 1
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DCD EXTI2_3_IRQHandler ; 6EXTI Line 2 and 3
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DCD EXTI4_15_IRQHandler ; 7EXTI Line 4 to 15
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DCD 0 ; 8Reserved
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DCD DMA1_Channel1_IRQHandler ; 9DMA1 Channel 1
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DCD DMA1_Channel2_3_IRQHandler ; 10DMA1 Channel 2 and Channel 3
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DCD 0 ; 11Reserved
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DCD ADC_COMP_IRQHandler ; 12ADC&COMP
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DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; 13TIM1 Break, Update, Trigger and Commutation
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DCD TIM1_CC_IRQHandler ; 14TIM1 Capture Compare
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DCD 0 ; 15Reserved
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DCD TIM3_IRQHandler ; 16TIM3
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DCD LPTIM1_IRQHandler ; 17LPTIM1
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DCD 0 ; 18Reserved
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DCD TIM14_IRQHandler ; 19TIM14
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DCD 0 ; 20Reserved
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DCD TIM16_IRQHandler ; 21TIM16
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DCD TIM17_IRQHandler ; 22TIM17
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DCD I2C1_IRQHandler ; 23I2C1
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DCD 0 ; 24Reserved
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DCD SPI1_IRQHandler ; 25SPI1
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DCD 0 ; 26Reserved
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DCD USART1_IRQHandler ; 27USART1
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DCD USART2_IRQHandler ; 28USART2
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DCD 0 ; 29Reserved
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DCD 0 ; 30Reserved
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DCD 0 ; 31Reserved
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:REORDER:NOROOT(2)
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Reset_Handler
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__iar_program_start
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BX R0
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PUBWEAK NMI_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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NMI_Handler
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B NMI_Handler
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PUBWEAK HardFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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HardFault_Handler
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B HardFault_Handler
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PUBWEAK SVC_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SVC_Handler
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B SVC_Handler
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PUBWEAK PendSV_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PendSV_Handler
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B PendSV_Handler
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PUBWEAK SysTick_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SysTick_Handler
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B SysTick_Handler
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PUBWEAK WWDG_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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WWDG_IRQHandler
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B WWDG_IRQHandler
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PUBWEAK PVD_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PVD_IRQHandler
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B PVD_IRQHandler
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PUBWEAK RTC_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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RTC_IRQHandler
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B RTC_IRQHandler
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PUBWEAK FLASH_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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FLASH_IRQHandler
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B FLASH_IRQHandler
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PUBWEAK RCC_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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RCC_IRQHandler
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B RCC_IRQHandler
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PUBWEAK EXTI0_1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI0_1_IRQHandler
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B EXTI0_1_IRQHandler
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PUBWEAK EXTI2_3_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI2_3_IRQHandler
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B EXTI2_3_IRQHandler
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PUBWEAK EXTI4_15_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI4_15_IRQHandler
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B EXTI4_15_IRQHandler
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PUBWEAK DMA1_Channel1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA1_Channel1_IRQHandler
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B DMA1_Channel1_IRQHandler
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PUBWEAK DMA1_Channel2_3_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA1_Channel2_3_IRQHandler
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B DMA1_Channel2_3_IRQHandler
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PUBWEAK ADC_COMP_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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ADC_COMP_IRQHandler
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B ADC_COMP_IRQHandler
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PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TIM1_BRK_UP_TRG_COM_IRQHandler
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B TIM1_BRK_UP_TRG_COM_IRQHandler
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PUBWEAK TIM1_CC_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TIM1_CC_IRQHandler
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B TIM1_CC_IRQHandler
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PUBWEAK TIM3_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TIM3_IRQHandler
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B TIM3_IRQHandler
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PUBWEAK LPTIM1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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LPTIM1_IRQHandler
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B LPTIM1_IRQHandler
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PUBWEAK TIM14_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TIM14_IRQHandler
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B TIM14_IRQHandler
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PUBWEAK TIM16_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TIM16_IRQHandler
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B TIM16_IRQHandler
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PUBWEAK TIM17_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TIM17_IRQHandler
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B TIM17_IRQHandler
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PUBWEAK I2C1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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I2C1_IRQHandler
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B I2C1_IRQHandler
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PUBWEAK SPI1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SPI1_IRQHandler
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B SPI1_IRQHandler
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PUBWEAK USART1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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USART1_IRQHandler
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B USART1_IRQHandler
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PUBWEAK USART2_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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USART2_IRQHandler
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B USART2_IRQHandler
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END
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/*****************************END OF FILE************************************/ |