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https://github.com/IcedRooibos/py32f0-template.git
synced 2025-10-30 09:22:06 -07:00
124 lines
3.7 KiB
C
124 lines
3.7 KiB
C
/***
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* Demo: TIM1 DMA Burst
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*/
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#include "main.h"
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#include "py32f0xx_bsp_printf.h"
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uint32_t TIM1DataBuff[] = {5,200,5,800,5,100,5,900,5,50,5,950};
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static void APP_DMABurstConfig(void);
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static void APP_PWMChannelConfig(void);
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static void APP_SystemClockConfig(void);
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static void APP_TIM1BaseConfig(void);
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int main(void)
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{
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APP_SystemClockConfig();
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BSP_USART_Config(115200);
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printf("TIM1 DMA Burst Demo\r\nClock: %ld \r\n", SystemCoreClock);
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APP_TIM1BaseConfig();
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APP_PWMChannelConfig();
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APP_DMABurstConfig();
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while (1);
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}
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static void APP_PWMChannelConfig(void)
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{
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LL_GPIO_InitTypeDef TIM1CH1MapInit = {0};
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LL_TIM_OC_InitTypeDef TIM_OC_Initstruct = {0};
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LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
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TIM1CH1MapInit.Pin = LL_GPIO_PIN_8;
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TIM1CH1MapInit.Mode = LL_GPIO_MODE_ALTERNATE;
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TIM1CH1MapInit.Alternate = LL_GPIO_AF_2;
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LL_GPIO_Init(GPIOA, &TIM1CH1MapInit);
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TIM_OC_Initstruct.OCMode = LL_TIM_OCMODE_PWM1;
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TIM_OC_Initstruct.OCState = LL_TIM_OCSTATE_ENABLE;
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TIM_OC_Initstruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
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TIM_OC_Initstruct.OCIdleState = LL_TIM_OCIDLESTATE_LOW;
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TIM_OC_Initstruct.CompareValue = 100;
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LL_TIM_OC_Init(TIM1, LL_TIM_CHANNEL_CH1, &TIM_OC_Initstruct);
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}
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static void APP_DMABurstConfig(void)
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{
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LL_DMA_InitTypeDef DMA_TIM1DMABurst ={0};
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG);
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DMA_TIM1DMABurst.PeriphOrM2MSrcAddress = (uint32_t)&(TIM1->DMAR);
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DMA_TIM1DMABurst.MemoryOrM2MDstAddress = (uint32_t)TIM1DataBuff;
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DMA_TIM1DMABurst.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
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DMA_TIM1DMABurst.Mode = LL_DMA_MODE_NORMAL;
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DMA_TIM1DMABurst.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
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DMA_TIM1DMABurst.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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DMA_TIM1DMABurst.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
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DMA_TIM1DMABurst.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
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DMA_TIM1DMABurst.Priority = LL_DMA_PRIORITY_MEDIUM;
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DMA_TIM1DMABurst.NbData = 12;
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LL_DMA_Init(DMA1, LL_DMA_CHANNEL_1, &DMA_TIM1DMABurst);
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LL_SYSCFG_SetDMARemap_CH1(LL_SYSCFG_DMA_MAP_TIM1_UP);
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LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1);
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LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
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NVIC_EnableIRQ(DMA1_Channel1_IRQn);
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NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
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}
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static void APP_TIM1BaseConfig(void)
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{
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LL_TIM_InitTypeDef TIM1CountInit = {0};
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM1);
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TIM1CountInit.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
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TIM1CountInit.CounterMode = LL_TIM_COUNTERMODE_UP;
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TIM1CountInit.Prescaler = 4800 - 1;
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TIM1CountInit.Autoreload = 1000 - 1;
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TIM1CountInit.RepetitionCounter = 1;
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LL_TIM_Init(TIM1, &TIM1CountInit);
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LL_TIM_EnableDMAReq_UPDATE(TIM1);
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/* DMA burst mode, each time 2 registers starting from RCR */
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LL_TIM_ConfigDMABurst(TIM1, LL_TIM_DMABURST_BASEADDR_RCR, LL_TIM_DMABURST_LENGTH_2TRANSFERS);
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LL_TIM_EnableAllOutputs(TIM1);
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LL_TIM_EnableCounter(TIM1);
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}
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static void APP_SystemClockConfig(void)
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{
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LL_UTILS_ClkInitTypeDef UTILS_ClkInitStruct;
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LL_RCC_HSI_Enable();
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/* Change this value to adjust clock frequency, larger is faster */
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LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz + 15);
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while (LL_RCC_HSI_IsReady() != 1);
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UTILS_ClkInitStruct.AHBCLKDivider = LL_RCC_SYSCLK_DIV_1;
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UTILS_ClkInitStruct.APB1CLKDivider = LL_RCC_APB1_DIV_1;
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LL_PLL_ConfigSystemClock_HSI(&UTILS_ClkInitStruct);
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/* Re-init frequency of SysTick source, reload = freq/ticks = 48000000/1000 = 48000 */
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LL_InitTick(48000000, 1000U);
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}
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void APP_ErrorHandler(void)
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{
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while (1);
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}
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#ifdef USE_FULL_ASSERT
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void assert_failed(uint8_t *file, uint32_t line)
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{
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while (1);
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}
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#endif /* USE_FULL_ASSERT */
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