mirror of
https://github.com/IcedRooibos/py32f0-template.git
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68 lines
2.6 KiB
C
68 lines
2.6 KiB
C
/**
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******************************************************************************
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* @file py32f0xx_bsp_printf.h
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* @author MCU Application Team
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* @brief
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef PY32F0XX_BSP_PRINTF_H
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#define PY32F0XX_BSP_PRINTF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include <stdio.h>
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#include "py32f0xx_hal.h"
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#ifdef HAL_UART_MODULE_ENABLED
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//debug printf redirect config
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#define DEBUG_USART_BAUDRATE 115200
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#define DEBUG_USART USART1
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#define DEBUG_USART_CLK_ENABLE() do { \
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__IO uint32_t tmpreg = 0x00U; \
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SET_BIT(RCC->APBENR2, RCC_APBENR2_USART1EN);\
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/* Delay after an RCC peripheral clock enabling */ \
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tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_USART1EN);\
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UNUSED(tmpreg); \
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} while(0U)
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#define __GPIOA_CLK_ENABLE() do { \
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__IO uint32_t tmpreg = 0x00U; \
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SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
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/* Delay after an RCC peripheral clock enabling */ \
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tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
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UNUSED(tmpreg); \
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} while(0U)
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#define DEBUG_USART_RX_GPIO_PORT GPIOA
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#define DEBUG_USART_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
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#define DEBUG_USART_RX_PIN GPIO_PIN_3
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#define DEBUG_USART_RX_AF GPIO_AF1_USART1
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#define DEBUG_USART_TX_GPIO_PORT GPIOA
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#define DEBUG_USART_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
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#define DEBUG_USART_TX_PIN GPIO_PIN_2
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#define DEBUG_USART_TX_AF GPIO_AF1_USART1
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#define DEBUG_USART_IRQHandler USART1_IRQHandler
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#define DEBUG_USART_IRQ USART1_IRQn
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extern UART_HandleTypeDef DebugUartHandle;
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#endif
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void BSP_USART_Config(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* PY32F0XX_BSP_PRINTF_H */
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