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			74 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			74 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /**
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|  * Independent Watchdog Demo
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| */
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| #include "main.h"
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| #include "py32f0xx_bsp_clock.h"
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| #include "py32f0xx_bsp_printf.h"
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| 
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| static void APP_GPIO_Config(void);
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| static void APP_IWDG_Config(void);
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| 
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| int main(void)
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| {
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|   uint8_t delay = 0;
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|   // Set HSI 24MHz as system clock source
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|   BSP_RCC_HSI_24MConfig();
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|   // Initialize UART on PA2:TX PA3:RX
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|   BSP_USART_Config(115200);
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|   printf("PY32F0 IWDG Demo\r\nClock: %ld\r\n", SystemCoreClock);
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|   // Set PB5 for LED output
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|   APP_GPIO_Config();
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| 
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|   APP_IWDG_Config();
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| 
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|   while (1)
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|   {
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|     /*
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|      * Watchdog will be triggered when delay exceeds 1 second
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|     */
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|     printf("Delay %d ... ", 900 + delay);
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|     LL_mDelay(900 + delay);
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|     LL_GPIO_TogglePin(GPIOB, LL_GPIO_PIN_5);
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|     printf("reload counter\r\n");
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|     LL_IWDG_ReloadCounter(IWDG);
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|     delay += 10;
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|   }
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| }
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| 
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| static void APP_GPIO_Config(void)
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| {
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|   LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
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|   LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_5, LL_GPIO_MODE_OUTPUT);
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| }
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| 
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| static void APP_IWDG_Config(void)
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| {
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|   // Enable LSI
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|   LL_RCC_LSI_Enable();
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|   while (LL_RCC_LSI_IsReady() == 0U) {;}
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|   // Enable IWDG
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|   LL_IWDG_Enable(IWDG);
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| 
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|   LL_IWDG_EnableWriteAccess(IWDG);
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|   // Set waiting period to around 1 ms
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|   LL_IWDG_SetPrescaler(IWDG, LL_IWDG_PRESCALER_32);
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|   // Set counter to 1000 -> around 1 seconds
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|   LL_IWDG_SetReloadCounter(IWDG, 1000);
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|   // Wait IWDG ready
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|   while (LL_IWDG_IsReady(IWDG) == 0U);
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|   // Reset counter
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|   LL_IWDG_ReloadCounter(IWDG);
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| }
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| 
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| void APP_ErrorHandler(void)
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| {
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|   while (1);
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| }
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| 
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| #ifdef  USE_FULL_ASSERT
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| void assert_failed(uint8_t *file, uint32_t line)
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| {
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|   while (1);
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| }
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| #endif /* USE_FULL_ASSERT */
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