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https://github.com/IcedRooibos/py32f0-template.git
synced 2025-10-29 00:42:06 -07:00
113 lines
3.1 KiB
C
113 lines
3.1 KiB
C
/***
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* Demo: ADC Triggered by TIM1
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*
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* PY32
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* PA4 ------> Input voltage between 0V ~ 3.3V
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*
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* PA2(TX) ------> RX
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* PA3(RX) ------> TX
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*/
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#include "main.h"
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#include "py32f0xx_bsp_clock.h"
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#include "py32f0xx_bsp_printf.h"
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#define VDDA_APPLI ((uint32_t)3300)
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static void APP_ADCConfig(void);
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static void APP_TimerInit(void);
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int main(void)
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{
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BSP_RCC_HSI_PLL48MConfig();
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BSP_USART_Config(115200);
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printf("ADC Timer Trigger Demo\r\nClock: %ld\r\n", SystemCoreClock);
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APP_ADCConfig();
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// Start ADC regular conversion and wait for next external trigger
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LL_ADC_REG_StartConversion(ADC1);
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APP_TimerInit();
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while (1);
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}
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static void APP_TimerInit(void)
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{
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM1);
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LL_TIM_SetPrescaler(TIM1, (SystemCoreClock / 6000) - 1);
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LL_TIM_SetAutoReload(TIM1, 6000 - 1);
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/* Triggered by update */
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LL_TIM_SetTriggerOutput(TIM1, LL_TIM_TRGO_UPDATE);
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LL_TIM_EnableCounter(TIM1);
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}
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static void APP_ADCConfig(void)
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{
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_ADC1);
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LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
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LL_ADC_Reset(ADC1);
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// Calibrate start
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if (LL_ADC_IsEnabled(ADC1) == 0)
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{
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LL_ADC_StartCalibration(ADC1);
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while (LL_ADC_IsCalibrationOnGoing(ADC1) != 0);
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/* Delay 1ms(>= 4 ADC clocks) before re-enable ADC */
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LL_mDelay(1);
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}
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// Calibrate end
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/* PA4 as analog input */
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LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG);
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/* Set ADC channel and clock source when ADEN=0, set other configurations when ADSTART=0 */
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LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_NONE);
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LL_ADC_SetClock(ADC1, LL_ADC_CLOCK_SYNC_PCLK_DIV2);
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LL_ADC_SetResolution(ADC1, LL_ADC_RESOLUTION_12B);
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LL_ADC_SetResolution(ADC1, LL_ADC_DATA_ALIGN_RIGHT);
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LL_ADC_SetLowPowerMode(ADC1, LL_ADC_LP_MODE_NONE);
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LL_ADC_SetSamplingTimeCommonChannels(ADC1, LL_ADC_SAMPLINGTIME_41CYCLES_5);
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/* Set TIM1 as trigger source */
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LL_ADC_REG_SetTriggerSource(ADC1, LL_ADC_REG_TRIG_EXT_TIM1_TRGO);
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LL_ADC_REG_SetTriggerEdge(ADC1, LL_ADC_REG_TRIG_EXT_RISING);
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LL_ADC_REG_SetContinuousMode(ADC1, LL_ADC_REG_CONV_SINGLE);
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/* Turn off DMA transfer */
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LL_ADC_REG_SetDMATransfer(ADC1, LL_ADC_REG_DMA_TRANSFER_NONE);
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LL_ADC_REG_SetOverrun(ADC1, LL_ADC_REG_OVR_DATA_OVERWRITTEN);
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LL_ADC_REG_SetSequencerDiscont(ADC1, LL_ADC_REG_SEQ_DISCONT_DISABLE);
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LL_ADC_REG_SetSequencerChannels(ADC1, LL_ADC_CHANNEL_4);
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LL_ADC_Enable(ADC1);
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LL_mDelay(1);
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/* Enable EOC(end of conversion) interrupt */
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LL_ADC_EnableIT_EOC(ADC1);
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NVIC_SetPriority(ADC_COMP_IRQn, 0);
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NVIC_EnableIRQ(ADC_COMP_IRQn);
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}
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void APP_ADC_EOC_Callback(void)
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{
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uint16_t mVoltage;
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uint32_t adcRead;
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/* Read ADC conversion result */
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adcRead = LL_ADC_REG_ReadConversionData12(ADC1);
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/* Convert the adc value to voltage value */
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mVoltage = __LL_ADC_CALC_DATA_TO_VOLTAGE(VDDA_APPLI, adcRead, LL_ADC_RESOLUTION_12B);
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printf("Channel4 voltage %d mV\r\n", mVoltage);
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}
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void APP_ErrorHandler(void)
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{
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while (1);
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}
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#ifdef USE_FULL_ASSERT
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void assert_failed(uint8_t *file, uint32_t line)
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{
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while (1);
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}
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#endif /* USE_FULL_ASSERT */
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