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https://github.com/IcedRooibos/py32f0-template.git
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70 lines
2.5 KiB
C
70 lines
2.5 KiB
C
/**
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******************************************************************************
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* @file py32f0xx_bsp_printf.h
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* @author MCU Application Team
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* @brief
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef PY32F003_BSP_PRINTF_H
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#define PY32F003_BSP_PRINTF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include <stdio.h>
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#include "py32f0xx_ll_rcc.h"
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#include "py32f0xx_ll_bus.h"
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#include "py32f0xx_ll_system.h"
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#include "py32f0xx_ll_exti.h"
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#include "py32f0xx_ll_cortex.h"
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#include "py32f0xx_ll_utils.h"
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#include "py32f0xx_ll_pwr.h"
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#include "py32f0xx_ll_dma.h"
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#include "py32f0xx_ll_gpio.h"
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#include "py32f0xx_ll_usart.h"
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//debug printf redirect config
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#define DEBUG_USART_BAUDRATE 115200
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#define DEBUG_USART USART2
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#define DEBUG_USART_CLK_ENABLE() LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2)
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#define __GPIOA_CLK_ENABLE() do { \
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__IO uint32_t tmpreg = 0x00U; \
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SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
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/* Delay after an RCC peripheral clock enabling */ \
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tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
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UNUSED(tmpreg); \
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} while(0U)
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#define DEBUG_USART_RX_GPIO_PORT GPIOA
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#define DEBUG_USART_RX_GPIO_CLK_ENABLE() LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA)
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#define DEBUG_USART_RX_PIN LL_GPIO_PIN_3
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#define DEBUG_USART_RX_AF LL_GPIO_AF_4
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#define DEBUG_USART_TX_GPIO_PORT GPIOA
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#define DEBUG_USART_TX_GPIO_CLK_ENABLE() LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA)
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#define DEBUG_USART_TX_PIN LL_GPIO_PIN_2
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#define DEBUG_USART_TX_AF LL_GPIO_AF_4
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#define DEBUG_USART_IRQHandler USART2_IRQHandler
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#define DEBUG_USART_IRQ USART2_IRQn
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/************************************************************/
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void BSP_USART_Config(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* PY32F003_BSP_PRINTF_H */
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