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			163 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			163 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* ----------------------------------------------------------------------    
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| * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
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| *    
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| * $Date:        19. March 2015
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| * $Revision: 	V.1.4.5
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| *    
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| * Project: 	    CMSIS DSP Library    
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| * Title:		arm_scale_q15.c    
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| *    
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| * Description:	Multiplies a Q15 vector by a scalar.    
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| *    
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| * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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| *  
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| * Redistribution and use in source and binary forms, with or without 
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| * modification, are permitted provided that the following conditions
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| * are met:
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| *   - Redistributions of source code must retain the above copyright
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| *     notice, this list of conditions and the following disclaimer.
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| *   - Redistributions in binary form must reproduce the above copyright
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| *     notice, this list of conditions and the following disclaimer in
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| *     the documentation and/or other materials provided with the 
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| *     distribution.
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| *   - Neither the name of ARM LIMITED nor the names of its contributors
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| *     may be used to endorse or promote products derived from this
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| *     software without specific prior written permission.
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| *
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| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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| * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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| * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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| * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
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| * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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| * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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| * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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| * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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| * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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| * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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| * POSSIBILITY OF SUCH DAMAGE.   
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| * -------------------------------------------------------------------- */
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| 
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| #include "arm_math.h"
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| 
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| /**    
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|  * @ingroup groupMath    
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|  */
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| 
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| /**    
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|  * @addtogroup scale    
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|  * @{    
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|  */
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| 
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| /**    
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|  * @brief Multiplies a Q15 vector by a scalar.    
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|  * @param[in]       *pSrc points to the input vector    
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|  * @param[in]       scaleFract fractional portion of the scale value    
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|  * @param[in]       shift number of bits to shift the result by    
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|  * @param[out]      *pDst points to the output vector    
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|  * @param[in]       blockSize number of samples in the vector    
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|  * @return none.    
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|  *    
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|  * <b>Scaling and Overflow Behavior:</b>    
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|  * \par    
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|  * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.    
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|  * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.    
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|  */
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| 
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| 
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| void arm_scale_q15(
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|   q15_t * pSrc,
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|   q15_t scaleFract,
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|   int8_t shift,
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|   q15_t * pDst,
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|   uint32_t blockSize)
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| {
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|   int8_t kShift = 15 - shift;                    /* shift to apply after scaling */
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|   uint32_t blkCnt;                               /* loop counter */
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| 
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| #ifndef ARM_MATH_CM0_FAMILY
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| 
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| /* Run the below code for Cortex-M4 and Cortex-M3 */
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|   q15_t in1, in2, in3, in4;
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|   q31_t inA1, inA2;                              /* Temporary variables */
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|   q31_t out1, out2, out3, out4;
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| 
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| 
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|   /*loop Unrolling */
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|   blkCnt = blockSize >> 2u;
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| 
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|   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
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|    ** a second loop below computes the remaining 1 to 3 samples. */
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|   while(blkCnt > 0u)
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|   {
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|     /* Reading 2 inputs from memory */
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|     inA1 = *__SIMD32(pSrc)++;
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|     inA2 = *__SIMD32(pSrc)++;
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| 
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|     /* C = A * scale */
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|     /* Scale the inputs and then store the 2 results in the destination buffer        
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|      * in single cycle by packing the outputs */
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|     out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
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|     out2 = (q31_t) ((q15_t) inA1 * scaleFract);
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|     out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
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|     out4 = (q31_t) ((q15_t) inA2 * scaleFract);
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| 
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|     /* apply shifting */
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|     out1 = out1 >> kShift;
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|     out2 = out2 >> kShift;
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|     out3 = out3 >> kShift;
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|     out4 = out4 >> kShift;
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| 
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|     /* saturate the output */
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|     in1 = (q15_t) (__SSAT(out1, 16));
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|     in2 = (q15_t) (__SSAT(out2, 16));
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|     in3 = (q15_t) (__SSAT(out3, 16));
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|     in4 = (q15_t) (__SSAT(out4, 16));
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| 
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|     /* store the result to destination */
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|     *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
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|     *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16);
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| 
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|     /* Decrement the loop counter */
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|     blkCnt--;
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|   }
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| 
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|   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
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|    ** No loop unrolling is used. */
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|   blkCnt = blockSize % 0x4u;
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| 
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|   while(blkCnt > 0u)
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|   {
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|     /* C = A * scale */
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|     /* Scale the input and then store the result in the destination buffer. */
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|     *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
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| 
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|     /* Decrement the loop counter */
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|     blkCnt--;
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|   }
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| 
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| #else
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| 
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|   /* Run the below code for Cortex-M0 */
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| 
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|   /* Initialize blkCnt with number of samples */
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|   blkCnt = blockSize;
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| 
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|   while(blkCnt > 0u)
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|   {
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|     /* C = A * scale */
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|     /* Scale the input and then store the result in the destination buffer. */
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|     *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
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| 
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|     /* Decrement the loop counter */
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|     blkCnt--;
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|   }
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| 
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| #endif /* #ifndef ARM_MATH_CM0_FAMILY */
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| 
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| }
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| 
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| /**    
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|  * @} end of scale group    
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|  */
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