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			151 lines
		
	
	
		
			5.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			151 lines
		
	
	
		
			5.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* ----------------------------------------------------------------------    
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| * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
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| *    
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| * $Date:        19. March 2015
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| * $Revision: 	V.1.4.5  
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| *    
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| * Project: 	    CMSIS DSP Library    
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| * Title:		arm_rms_q31.c    
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| *    
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| * Description:	Root Mean Square of the elements of a Q31 vector.    
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| *    
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| * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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| *  
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| * Redistribution and use in source and binary forms, with or without 
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| * modification, are permitted provided that the following conditions
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| * are met:
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| *   - Redistributions of source code must retain the above copyright
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| *     notice, this list of conditions and the following disclaimer.
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| *   - Redistributions in binary form must reproduce the above copyright
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| *     notice, this list of conditions and the following disclaimer in
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| *     the documentation and/or other materials provided with the 
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| *     distribution.
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| *   - Neither the name of ARM LIMITED nor the names of its contributors
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| *     may be used to endorse or promote products derived from this
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| *     software without specific prior written permission.
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| *
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| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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| * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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| * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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| * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
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| * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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| * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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| * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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| * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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| * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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| * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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| * POSSIBILITY OF SUCH DAMAGE.    
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| * ---------------------------------------------------------------------------- */
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| 
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| #include "arm_math.h"
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| 
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| /**        
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|  * @addtogroup RMS        
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|  * @{        
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|  */
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| 
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| 
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| /**        
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|  * @brief Root Mean Square of the elements of a Q31 vector.        
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|  * @param[in]       *pSrc points to the input vector        
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|  * @param[in]       blockSize length of the input vector        
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|  * @param[out]      *pResult rms value returned here        
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|  * @return none.        
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|  *        
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|  * @details        
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|  * <b>Scaling and Overflow Behavior:</b>        
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|  *        
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|  *\par        
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|  * The function is implemented using an internal 64-bit accumulator.        
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|  * The input is represented in 1.31 format, and intermediate multiplication        
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|  * yields a 2.62 format.        
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|  * The accumulator maintains full precision of the intermediate multiplication results,         
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|  * but provides only a single guard bit.        
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|  * There is no saturation on intermediate additions.        
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|  * If the accumulator overflows, it wraps around and distorts the result.         
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|  * In order to avoid overflows completely, the input signal must be scaled down by         
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|  * log2(blockSize) bits, as a total of blockSize additions are performed internally.         
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|  * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.        
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|  *        
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|  */
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| 
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| void arm_rms_q31(
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|   q31_t * pSrc,
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|   uint32_t blockSize,
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|   q31_t * pResult)
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| {
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|   q63_t sum = 0;                                 /* accumulator */
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|   q31_t in;                                      /* Temporary variable to store the input */
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|   uint32_t blkCnt;                               /* loop counter */
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| 
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| #ifndef ARM_MATH_CM0_FAMILY
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| 
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|   /* Run the below code for Cortex-M4 and Cortex-M3 */
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| 
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|   q31_t in1, in2, in3, in4;                      /* Temporary input variables */
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| 
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|   /*loop Unrolling */
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|   blkCnt = blockSize >> 2u;
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| 
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|   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.        
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|    ** a second loop below computes the remaining 1 to 7 samples. */
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|   while(blkCnt > 0u)
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|   {
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|     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
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|     /* Compute sum of the squares and then store the result in a temporary variable, sum */
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|     /* read two samples from source buffer */
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|     in1 = pSrc[0];
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|     in2 = pSrc[1];
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| 
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|     /* calculate power and accumulate to accumulator */
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|     sum += (q63_t) in1 *in1;
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|     sum += (q63_t) in2 *in2;
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| 
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|     /* read two samples from source buffer */
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|     in3 = pSrc[2];
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|     in4 = pSrc[3];
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| 
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|     /* calculate power and accumulate to accumulator */
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|     sum += (q63_t) in3 *in3;
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|     sum += (q63_t) in4 *in4;
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| 
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| 
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|     /* update source buffer to process next samples */
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|     pSrc += 4u;
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| 
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|     /* Decrement the loop counter */
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|     blkCnt--;
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|   }
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| 
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|   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.        
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|    ** No loop unrolling is used. */
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|   blkCnt = blockSize % 0x4u;
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| 
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| #else
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| 
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|   /* Run the below code for Cortex-M0 */
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|   blkCnt = blockSize;
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| 
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| #endif /* #ifndef ARM_MATH_CM0_FAMILY */
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| 
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|   while(blkCnt > 0u)
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|   {
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|     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
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|     /* Compute sum of the squares and then store the results in a temporary variable, sum */
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|     in = *pSrc++;
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|     sum += (q63_t) in *in;
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| 
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|     /* Decrement the loop counter */
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|     blkCnt--;
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|   }
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| 
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|   /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
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|   /* Compute Rms and store the result in the destination vector */
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|   arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
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| }
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| 
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| /**        
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|  * @} end of RMS group        
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|  */
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