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feat: ll adc dma example
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IOsetting
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203
Examples/LL/ADC/ADC_SingleConversion_TriggerTimer_DMA/main.c
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203
Examples/LL/ADC/ADC_SingleConversion_TriggerTimer_DMA/main.c
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#include "main.h"
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#include "py32f0xx_bsp_printf.h"
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#define ADC_CALIBRATION_TIMEOUT_MS ((uint32_t) 1)
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#define VDDA_APPLI ((uint32_t)3300)
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#define VAR_CONVERTED_DATA_INIT_VALUE (__LL_ADC_DIGITAL_SCALE(LL_ADC_RESOLUTION_12B) + 1)
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/* Private variables ---------------------------------------------------------*/
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__IO uint32_t ubUserButtonPressed = 0;
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__IO uint16_t uhADCxConvertedData = VAR_CONVERTED_DATA_INIT_VALUE;
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__IO uint16_t uhADCxConvertedData_Voltage_mVolt = 0;
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static uint32_t ADCxConvertedDatas;
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static void APP_SystemClockConfig(void);
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static void APP_AdcCalibrate(void);
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static void APP_AdcConfig(void);
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static void APP_GPIOConfig(void);
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static void APP_TimerInit(void);
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static void APP_DmaConfig(void);
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int main(void)
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{
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APP_SystemClockConfig();
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APP_GPIOConfig();
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BSP_USART_Config(115200);
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printf("ADC Timer Trigger DMA Demo\r\nClock: %ld \r\n", SystemCoreClock);
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APP_DmaConfig();
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LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
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LL_ADC_Reset(ADC1);
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_ADC1);
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APP_AdcCalibrate();
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APP_AdcConfig();
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LL_ADC_Enable(ADC1);
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/* Ensure ADC is stable, >= 8 ADC Clock */
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LL_mDelay(1);
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LL_ADC_REG_StartConversion(ADC1);
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APP_TimerInit();
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while (1)
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{
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LL_GPIO_TogglePin(GPIOB, LL_GPIO_PIN_5);
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LL_mDelay(1000);
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}
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}
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static void APP_AdcConfig(void)
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{
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LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
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/* PA4 as ADC input */
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LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG);
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/* Set ADC channel and clock source when ADEN=0, set other configurations when ADSTART=0 */
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LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_NONE);
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LL_ADC_SetClock(ADC1, LL_ADC_CLOCK_SYNC_PCLK_DIV2);
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LL_ADC_SetResolution(ADC1, LL_ADC_RESOLUTION_12B);
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LL_ADC_SetResolution(ADC1, LL_ADC_DATA_ALIGN_RIGHT);
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LL_ADC_SetLowPowerMode(ADC1, LL_ADC_LP_MODE_NONE);
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LL_ADC_SetSamplingTimeCommonChannels(ADC1, LL_ADC_SAMPLINGTIME_41CYCLES_5);
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/* Set TIM1 as trigger source */
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LL_ADC_REG_SetTriggerSource(ADC1, LL_ADC_REG_TRIG_EXT_TIM1_TRGO);
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LL_ADC_REG_SetTriggerEdge(ADC1, LL_ADC_REG_TRIG_EXT_RISING);
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LL_ADC_REG_SetContinuousMode(ADC1, LL_ADC_REG_CONV_SINGLE);
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LL_ADC_REG_SetDMATransfer(ADC1, LL_ADC_REG_DMA_TRANSFER_UNLIMITED);
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LL_ADC_REG_SetOverrun(ADC1, LL_ADC_REG_OVR_DATA_OVERWRITTEN);
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LL_ADC_REG_SetSequencerDiscont(ADC1, LL_ADC_REG_SEQ_DISCONT_DISABLE);
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LL_ADC_REG_SetSequencerChannels(ADC1, LL_ADC_CHANNEL_4);
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}
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static void APP_AdcCalibrate(void)
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{
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__IO uint32_t backup_setting_adc_dma_transfer = 0;
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#if (USE_TIMEOUT == 1)
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uint32_t Timeout = 0;
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#endif
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if (LL_ADC_IsEnabled(ADC1) == 0)
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{
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/* Backup current settings */
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backup_setting_adc_dma_transfer = LL_ADC_REG_GetDMATransfer(ADC1);
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/* Turn off DMA when calibrating */
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LL_ADC_REG_SetDMATransfer(ADC1, LL_ADC_REG_DMA_TRANSFER_NONE);
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LL_ADC_StartCalibration(ADC1);
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#if (USE_TIMEOUT == 1)
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Timeout = ADC_CALIBRATION_TIMEOUT_MS;
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#endif
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while (LL_ADC_IsCalibrationOnGoing(ADC1) != 0)
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{
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#if (USE_TIMEOUT == 1)
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/* 检测校准是否超时 */
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if (LL_SYSTICK_IsActiveCounterFlag())
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{
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if(Timeout-- == 0)
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{
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}
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}
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#endif
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}
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/* Delay before re-enable ADC */
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LL_mDelay(1);
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/* Apply saved settings */
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LL_ADC_REG_SetDMATransfer(ADC1, backup_setting_adc_dma_transfer);
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}
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}
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static void APP_TimerInit(void)
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{
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM1);
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/* Set period to 48000000 */
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LL_TIM_SetPrescaler(TIM1, 6000);
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LL_TIM_SetAutoReload(TIM1, 8000);
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/* Triggered by update */
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LL_TIM_SetTriggerOutput(TIM1, LL_TIM_TRGO_UPDATE);
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LL_TIM_EnableCounter(TIM1);
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}
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static void APP_DmaConfig(void)
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{
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG);
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/* ADC -> LL_DMA_CHANNEL_1 */
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SET_BIT(SYSCFG->CFGR3, 0x0);
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LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
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LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_HIGH);
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LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MODE_CIRCULAR);
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LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_NOINCREMENT);
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LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_WORD);
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LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_WORD);
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LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_1, 1);
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LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_1, (uint32_t)&ADC1->DR, (uint32_t)&ADCxConvertedDatas, LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1));
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/* Enable transfer-complete interrupt */
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LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1);
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NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
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NVIC_EnableIRQ(DMA1_Channel1_IRQn);
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}
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void APP_TransferCompleteCallback(void)
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{
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/* Convert the adc value to voltage value */
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uhADCxConvertedData_Voltage_mVolt = __LL_ADC_CALC_DATA_TO_VOLTAGE(VDDA_APPLI, ADCxConvertedDatas, LL_ADC_RESOLUTION_12B);
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printf("%s%s%d mV\r\n","Channel4","Voltage:",uhADCxConvertedData_Voltage_mVolt);
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}
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static void APP_SystemClockConfig(void)
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{
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LL_UTILS_ClkInitTypeDef UTILS_ClkInitStruct;
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LL_RCC_HSI_Enable();
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/* Change this value to adjust frequency */
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LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz + 15);
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while(LL_RCC_HSI_IsReady() != 1);
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UTILS_ClkInitStruct.AHBCLKDivider = LL_RCC_SYSCLK_DIV_1;
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UTILS_ClkInitStruct.APB1CLKDivider = LL_RCC_APB1_DIV_1;
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LL_PLL_ConfigSystemClock_HSI(&UTILS_ClkInitStruct);
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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/* Re-init frequency of SysTick source, reload = freq/ticks = 48000000/1000 = 48000 */
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LL_InitTick(48000000, 1000U);
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/* Update global SystemCoreClock(or through SystemCoreClockUpdate function) */
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LL_SetSystemCoreClock(48000000);
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}
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static void APP_GPIOConfig(void)
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{
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LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
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LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_5, LL_GPIO_MODE_OUTPUT);
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}
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void APP_ErrorHandler(void)
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{
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while (1);
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}
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#ifdef USE_FULL_ASSERT
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void assert_failed(uint8_t *file, uint32_t line)
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{
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while (1);
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}
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#endif /* USE_FULL_ASSERT */
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32
Examples/LL/ADC/ADC_SingleConversion_TriggerTimer_DMA/main.h
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32
Examples/LL/ADC/ADC_SingleConversion_TriggerTimer_DMA/main.h
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#ifndef __MAIN_H
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#define __MAIN_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "py32f0xx_ll_adc.h"
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#include "py32f0xx_ll_bus.h"
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#include "py32f0xx_ll_cortex.h"
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#include "py32f0xx_ll_dma.h"
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#include "py32f0xx_ll_exti.h"
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#include "py32f0xx_ll_gpio.h"
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#include "py32f0xx_ll_pwr.h"
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#include "py32f0xx_ll_rcc.h"
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#include "py32f0xx_ll_system.h"
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#include "py32f0xx_ll_tim.h"
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#include "py32f0xx_ll_utils.h"
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#if defined(USE_FULL_ASSERT)
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#include "py32_assert.h"
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#endif /* USE_FULL_ASSERT */
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void APP_ErrorHandler(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __MAIN_H */
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#ifndef __PY32_ASSERT_H
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#define __PY32_ASSERT_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef USE_FULL_ASSERT
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#include "stdint.h"
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/**
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* @brief The assert_param macro is used for function's parameters check.
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* @param expr: If expr is false, it calls assert_failed function
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* which reports the name of the source file and the source
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* line number of the call that failed.
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* If expr is true, it returns no value.
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* @retval None
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*/
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#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
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void assert_failed(uint8_t* file, uint32_t line);
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#else
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#define assert_param(expr) ((void)0U)
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#endif /* USE_FULL_ASSERT */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PY32_ASSERT_H */
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#include "main.h"
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#include "py32f0xx_it.h"
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extern void APP_TransferCompleteCallback(void);
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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while (1)
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{
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}
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}
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/**
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* @brief This function handles System service call via SWI instruction.
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*/
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void SVC_Handler(void)
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{
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}
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/**
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* @brief This function handles Pendable request for system service.
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*/
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void PendSV_Handler(void)
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{
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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}
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void DMA1_Channel1_IRQHandler(void)
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{
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if(LL_DMA_IsActiveFlag_TC1(DMA1) == 1)
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{
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LL_DMA_ClearFlag_TC1(DMA1);
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APP_TransferCompleteCallback();
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}
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}
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#ifndef __PY32F0XX_IT_H
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#define __PY32F0XX_IT_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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void NMI_Handler(void);
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void HardFault_Handler(void);
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void SVC_Handler(void);
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void PendSV_Handler(void);
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void SysTick_Handler(void);
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void DMA1_Channel1_IRQHandler(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PY32F0XX_IT_H */
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