mirror of
https://github.com/IcedRooibos/py32f0-template.git
synced 2025-10-29 08:52:04 -07:00
89 lines
2.6 KiB
C
89 lines
2.6 KiB
C
#include "py32f0xx_bsp_clock.h"
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void BSP_RCC_HSI_24MConfig(void)
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{
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LL_RCC_HSI_Enable();
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LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz);
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while(LL_RCC_HSI_IsReady() != 1);
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSISYS);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSISYS);
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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/* Update global SystemCoreClock(or through SystemCoreClockUpdate function) */
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LL_SetSystemCoreClock(24000000);
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/* Re-init frequency of SysTick source */
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LL_Init1msTick(24000000);
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}
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void BSP_RCC_HSI_8MConfig(void)
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{
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LL_RCC_HSI_Enable();
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while(LL_RCC_HSI_IsReady() != 1);
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSISYS);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSISYS);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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LL_SetSystemCoreClock(8000000);
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LL_Init1msTick(8000000);
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}
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void BSP_RCC_HSE_Config(void)
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{
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LL_RCC_HSE_Enable();
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LL_RCC_HSE_SetFreqRegion(LL_RCC_HSE_16_32MHz);
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while(LL_RCC_HSE_IsReady() != 1);
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSE);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSE);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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/* Update global SystemCoreClock(or through SystemCoreClockUpdate function) */
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LL_SetSystemCoreClock(HSE_VALUE);
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/* Re-init frequency of SysTick source */
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LL_Init1msTick(HSE_VALUE);
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}
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#if defined(RCC_PLL_SUPPORT)
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void BSP_RCC_HSI_PLL48MConfig(void)
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{
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LL_UTILS_ClkInitTypeDef UTILS_ClkInitStruct;
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LL_RCC_HSI_Enable();
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/* Change this value to adjust clock frequency, larger is faster */
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LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_24MHz);
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while (LL_RCC_HSI_IsReady() != 1);
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UTILS_ClkInitStruct.AHBCLKDivider = LL_RCC_SYSCLK_DIV_1;
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UTILS_ClkInitStruct.APB1CLKDivider = LL_RCC_APB1_DIV_1;
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LL_PLL_ConfigSystemClock_HSI(&UTILS_ClkInitStruct);
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/* Re-init frequency of SysTick source, reload = freq/ticks = 48000000/1000 = 48000 */
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LL_Init1msTick(48000000);
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}
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void BSP_RCC_HSE_PLLConfig(void)
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{
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LL_UTILS_ClkInitTypeDef UTILS_ClkInitStruct;
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LL_RCC_HSE_Enable();
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LL_RCC_HSE_SetFreqRegion(LL_RCC_HSE_16_32MHz);
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while(LL_RCC_HSE_IsReady() != 1);
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UTILS_ClkInitStruct.AHBCLKDivider = LL_RCC_SYSCLK_DIV_1;
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UTILS_ClkInitStruct.APB1CLKDivider = LL_RCC_APB1_DIV_1;
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LL_PLL_ConfigSystemClock_HSE(HSE_VALUE, LL_UTILS_HSEBYPASS_OFF, &UTILS_ClkInitStruct);
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/* Re-init frequency of SysTick source */
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LL_Init1msTick(HSE_VALUE * 2);
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}
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#endif |